• 联系我们
  • 加入收藏
您现在的位置: 首 页 > 公司信息与招聘 > 招聘平台 > 职场人士 > 正文

FPGA Engineer-FPGA 工程师(西安)

FPGA Engineer-FPGA工程师 西安

简历请投至:welcome@xdge-auto.com

Roles & Responsibilities

FPGA Hardware Engineer will be responsible for FPGA design, development and verification in Power Relay Protection System. Take charge of feature analysis and algorithm implementation, verification and test on board. Support and solve problems during system level test.

FPGA硬件工程师负责FPGA设计,在电力继电保护系统中开发和验证。负责特征分析及算法实现、验证及单板测试。支持和解决系统级测试过程中出现的问题。

Main Responsibilities

  • Become expert on the electronics of the transferred product technology

  • 快速学习并掌握在技术转移中引进的产品与技术

  • Lead a hardware team in establishing a comprehensive development capability to support ongoing design and sustaining engineering activities

  • 具备硬件设计所需的研发能力,能持续支持产品的设计和改进

  • Create high level hardware specifications and effort estimates for required product enhancements

  • 完成硬件设计和产品全生命周期持续改进支持

  • Create the hardware test strategy for new or modified features

  • 确认产品的质量、性能及功能改进

Qualifications Required:

  • 3-5 years of relevant FPGA design experience

3-5年相关的FPGA设计经验

  • Expert understanding of Mainstream providers’ FPGA system architecture and familiarity with development of Lattice and Actel‘s FPGA preferred

熟悉主流供应商的FPGA系统架构。具有Latiice,Actel FPGA开发经验者优先.

  • Excellent understanding of digital circuit, logical design and timing analysis. Familiar with Modelsim, ISE, QuartusII and other necessary EDA tools.

深刻理解数字电路,逻辑设计和时序分析。熟悉ModelSim,ISE,QuartusII和其他必要的EDA工具

  • Familiarity with verilog and vhdl language and intensively understanding of the synthesize of hardware description language.

熟悉Verilog/VHDL硬件描述语言,对硬件描述语言的综合具备深刻理解

  • Expert understanding of 802.1 protocol, Familiarity with Ethernet packet Processing Flow

熟悉802.1以太网协议。熟悉以太网报文的基本处理流程。

  • Familiarity with the time synchronization, understanding of time synchronization of GPS, IRIG-B code。

熟悉时间同步技术,对GPS时间同步,IRIG-B码等有一定的了解。

  • Expert understanding of Local bus,MII,SPORT, SPI,UART,I2C interfaces. Familiarity with FPGA implementation of these interfaces。

熟悉local bus,MII,SPORT,SPI,UART,I2c等常见的接口以及FPGA 实现。

  • Experience with design for product reliability. ALT/HALT preferred.

具有产品可靠性设计经验。熟悉ALT优先

  • Experience with design for manufacture and product sustaining engineering

具有制造设计和产品工程维护经验

  • Degree or equivalent in Electrical or Electronic Engineering

电气或电子工程专业,本科及以上学历

  • Excellent English language fluency, oral and written. Comfortable with technical discussions in English.

优秀的英语读写能力,能使用流畅的英语进行技术交流

联系我们

西安总部

    • 地址:陕西省西安市经济开发区
    •           凤城六路101号
    • 总机:029-88347500
    • 服务热线:400 860 1152
    • 传真:029-88347599
    • 民营企业清欠联系人:董媛
    • 联系电话:029-88347583
    • 邮箱:qingqian@xdge-auto.com

上海分公司

    • 地址:上海市闵行区莲花南路2899号
    •           莲谷科技园1号楼104
    • 电话:029-88347564

版权所有:西电通用电气自动化有限公司  陕ICP备13001388号 技术支持:西安博达软件